Code Acceleration on x86 architecture

Optimize for x86 family of platforms based on Intel/AMD chips. Your application will benefit from code acceleration in HPC setting that
might include large parallel machines as well as in mobile, Intel Atom based, devices, such as netbooks and tablets.
More specifically code acceleration involves the following steps:
  • Parallelize your code, if it is not already parallel.
  • Optimize core utilization in order to use as many cores as available on the device.
  • Rewrite performance-critical inner loops to take advantage of instruction-level parallelism via
    SIMD instruction sets (SSEx and/or AVX, including FMA).
  • (Optionally) Identify and replace common mathematical computations by optimized Intel MKL or IPP library calls.